1. Field of the Invention
The present invention relates to CMOS electronic circuits, and particularly to a CMOS current-mode squaring circuit.
2. Description of the Related Art
The squaring circuit is a very important building block in analog signal processing applications. This includes, but is not limited to, RMS-DC converters, pseudo-exponential cells, CMOS companding filters, fuzzy control, multipliers, etc.
A number of squaring circuits have been published in the literature. They can be categorized into three modes, including voltage-mode, current-mode, and voltage/current-mode.
It is well known that current-mode circuits are better than their voltage-mode counterpart circuits because they offer high bandwidth, larger dynamic range, simple circuitry, and lower power consumption. Squaring circuits designed using MOSFET in saturation can be classified in two categories. The first category is the direct approach using a MOS translinear loop. The second approach uses an analog multiplier to obtain the squaring output. This multiplier can be designed with a MOS transistor operated in the saturation region, or both a saturation and a triode region.
Due to the scaling down in the dimensions of the MOSFET transistor, a transistor model that accounts for second order effects has to be used in the analysis and simulation of circuits under consideration.
Thus, a CMOS current-mode squaring circuit addressing the aforementioned problems is desired.